Vlsi design and embedded systems - Free Essay Example

Sample details Pages: 21 Words: 6255 Downloads: 4 Date added: 2017/06/26 Category Statistics Essay Did you like this example? CHAPTER 1 INTRODUCTION 1.1 Motivation Phase locked loop (PLL) [1-3] is the heart of the many modern electronics as well as communication system. Recently plenty of the researches have conducted on the design of phase locked loop (PLL) circuit and still research is going on this topic. Most of the researches have conducted to realize a higher lock range PLL with lesser lock time [4] and have tolerable phase noise. Don’t waste time! Our writers will create an original "Vlsi design and embedded systems" essay for you Create order The most versatile application of the phase locked loops (PLL) is for clock generation and clock recovery in microprocessor, networking, communication systems, and frequency synthesizers. Phase locked-loops (PLLs) are commonly used to generate well-timed on-chip clocks in high-performance digital systems. Modern wireless communication systems employ Phase Locked Loop (PLL) mainly for synchronization, clock synthesis, skew and jitter reduction [5]. Phase locked loops find wide application in several modern applications mostly in advance communication and instrumentation systems. PLL being a mixed signal circuit involves design challenge at high frequency. Since its inspection in early 1930s, where it was used in the synchronization of the horizontal and vertical scans of television, it has come to an advanced form of integrated circuit (IC). Today found uses in many other applications. The first PLL ICs were available around 1965; it was built using purely analog component. Recent advances in integrated circuit design techniques have led to the development of high performance PLL which has become more economical and reliable. Now a whole PLL circuit can be integrated as a part of a larger circuit on a single chip. There are mainly five blocks in a PLL. These are phase frequency detector (PFD), charge pump (CP), low pass loop filter (LPF), voltage controlled oscillator (VCO) and frequency divider. Presently almost all communication and electronics devices operate at a higher frequency, so for that purpose we need a faster locking PLL. So there are a lot of challenges in designing the mentioned different blocks of the PLL to operate at a higher frequency. And these challenges motivated me towards this research topic. In this work mainly the faster locking of the PLL is concentrated by properly choosing the circuit architectures and parameters. The optimization of the VCO circuit is also carried out in this work to get a better frequency precision. 1.2 Organization of Thesis Before going into the details of the PLL, the motivation behind this work is mentioned in the Chapter 1 of the thesis. Chapter 2 briefly describes the whole PLL system. An introduction to the PLL circuit is mentioned in the section 2.1. Section 2.2 contains the detail architecture of the whole PLL system. Different types of PLLs are mentioned in the section 2.3. Section 2.4 explains the basic terms used in the PLL system while the consecutive sections give the details about the noise and application of the PLL. Chapter 3 builds the concepts of optimization. Definition of optimization technique and different circuit optimization techniques are presented in section 3.1 and 3.2 respectively. Section 3.3 gives the brief outline of the concept of geometric programming and convex optimization. The optimization of the CSVCO circuit is explained in section 3.4. The design and synthesis of the PLL is described in Chapter 4. The different design environments used in this work is mentioned in the section 4.1. The adopted design procedure is explained in section 4.2. Section 4.3 gives the design specifications and parameters of the work. The simulation results of the different circuits used in the PLL are depicted in the different sections of the Chapter 5. The performance of the CSVCO designed using convex optimization is compared with that of the traditional method in section 5.3. Section 5.5 gives the different simulation results of the PLL and its performance comparison between schematic and post layout level. At last Chapter 6 provides the conclusion that inferred from the work. CHAPTER 2 PHASE LOCKED LOOP 2.1 Introduction A PLL is a closed-loop feedback system that sets fixed phase relationship between its output clock phase and the phase of a reference clock. A PLL is capable of tracking the phase changes that falls in this bandwidth of the PLL. A PLL also multiplies a low-frequency reference clock CKref to produce a high-frequency clock CKout this is known as clock synthesis. A PLL has a negative feedback control system circuit. The main objective of a PLL is to generate a signal in which the phase is the same as the phase of a reference signal. This is achieved after many iterations of comparison of the reference and feedback signals. In this lock mode the phase of the reference and feedback signal is zero. After this, the PLL continues to compare the two signals but since they are in lock mode, the PLL output is constant. The basic block diagram of the PLL is shown in the Figure 2.1. In general a PLL consists of five main blocks: Phase Detector or Phase Frequency Detector (PD or PFD) Charge Pump (CP) Low Pass Filter (LPF) Voltage Controlled Oscillator (VCO) Divide by N Counter The Phase frequency Detector (PFD) is one of the main parts in PLL circuits. It compares the phase and frequency difference between the reference clock and the feedback clock. Depending upon the phase and frequency deviation, it generates two output signals UP and DOWN. The Charge Pump (CP) circuit is used in the PLL to combine both the outputs of the PFD and give a single output. The output of the CP circuit is fed to a Low Pass Filter (LPF) to generate a DC control voltage. The phase and frequency of the Voltage Controlled Oscillator (VCO) output depends on the generated DC control voltage. If the PFD generates an UP signal, the error voltage at the output of LPF increases which in turn increase the VCO output signal frequency. On the contrary, if a DOWN signal is generated, the VCO output signal frequency decreases. The output of the VCO is then fed back to the PFD in order to recalculate the phase difference, and then we can create closed loop frequency control system. 2.2 PLL Architecture The architecture of a charge-pump PLL is shown in Figure 2.2. A PLL comprises of several components. They are (1) phase or phase frequency detector, (2) charge pump, (3) loop filter, (4) voltage-controlled oscillator, and (5) frequency divider. The functioning of each block is briefly explained below. 2.2.1 PhaseFrequency Detector The Phase frequency Detector (PFD) is one of the main part in PLL circuits. It compares the phase and frequency difference between the reference clock and the feedback clock. Depending upon the phase and frequency deviation, it generates two output signals UP and DOWN. Figure 2.3 shows a traditional PFD circuit. If there is a phase difference between the two signals, it will generate UP or DOWN synchronized signals. When the reference clock rising edge leads the feedback input clock rising edge UP signal goes high while keeping DOWN signal low. On the other hand if the feedback input clock rising edge leads the reference clock rising edge DOWN signal goes high and UP signal goes low. Fast phase and frequency acquisition PFDs [6-7] are generally preferred over traditional PFD. 2.2.2ChargePump and Loop Filter Charge pump circuit is an important block of the whole PLL system. It converts the phase or frequency difference information into a voltage, used to tune the VCO. Charge pump circuit is used to combine both the outputs of the PFD and give a single output which is fed to the input of the filter. Charge pump circuit gives a constant current of value IPDI which should be insensitive to the supply voltage variation [8]. The amplitude of the current always remains same but the polarity changes which depend on the value of the UP and DOWN signal. The schematic diagram of the charge pump circuit with loop filter is shown in the Figure 2.4. When the UP signal goes high M2 transistor turns ON while M1 is OFF and the output current is IPDI with a positive polarity. When the down signal becomes high M1 transistor turns ON while M2 is OFF and the output current is IPDI with a negative polarity. The charge pump output current [3] is given by IPDI=IPUMPIPUMP4 =2IPUMP4 =IPUMP2 =KPDI (1) Where KPDI=IPUMP2 (amps/radian) (2) The passive low pass loop filter is used to convert back the charge pump current into the voltage. The filter should be as compact as possible [9].The output voltage of the loop filter controls the oscillation frequency of the VCO. The loop filter voltage will increase if Fref rising edge leads Fin rising edge and will decrease if Fin rising edge leads Fref rising edge. If the PLL is in locked state it maintains a constant value. The VCO input voltage is given by Vinvco = KF IPDI (3) Where KF is the gain of the loop filter. 2.2.3Voltage ControlledOscillator An oscillator is an autonomous system which generates a periodic output without any input. The most popular type of the VCO circuit is the current starved voltage controlled oscillator (CSVCO). Here the number of inverter stages is fixed with 5. The simplified view of a single stage current starved oscillator is shown in the Figure 2.5. Transistors M2 and M3 operate as an inverter while M1 and M4 operate as current sources. The current sources, Ml and M4, limit the current available to the inverter, M2 and M3; in other words, the inverter is starved for current. The desired center frequency of the designed circuit is 1GHz with a supply of 1.8V. The CSVCO is designed both in usual manner as mentioned in [3], [10, 11]. The general circuit diagram of the current starved voltage controlled oscillator is shown in the Figure 2.6. To determine the design equations for the CSVCO, consider the simplified view of VCO in Figure 2.5. The total capacitance on the drains of M2 and M3 is given by Ctot=52Cox(LpWp+LnWn) (4) The time it takes to charge Ctot from zero to VSP with the constant current ID4 is given by t1=VSPID4Ctot (5) While the time it takes to discharge Ctot from VDD to VSP is given by t1=VDD-VSPID1Ctot (6) If we set ID4= ID1=ID then the sum of t1 and t2 is given by t1+t2=VDDIDCtot (7) The oscillation frequency of CSVCO for N number of stage is fosc=1Nt1+t2=IDNCtotVDD (8) This is equal to fcenter when Vinvco=VDD2 (9) The gain of the VCO is given by KVCO=fmax-fminVmax-Vmin HzV (10) 2.2.4 FrequencyDivider The output of the VCO is fed back to the input of PFD through the frequency divider circuit. The frequency divider in the PLL circuit forms a closed loop. It scales down the frequency of the VCO output signal. A simple D flip flop (DFF) acts as a frequency divider circuit. The schematic of a simple DFF based divide by 2 frequency divider circuit is shown in the Figure 2.7. 2.3 Types of PLL There are mainly 4 types of PLL are available. They are . Liner PLL Digital PLL All Digital PLL Soft PLL 2.4 Terms in PLL 2.4.1 Lock in Range Once the PLL is in lock state what is the range of frequencies for which it can keep itself locked is called as lock in range. This is also called as tracking range or holding range. 2.4.2 Capture Range When the PLL is initially not in lock, what frequency range can make PLL lock is called as capture range. This is also known as acquisition range. This is directly proportional to the LPF bandwidth. Reduction in the loop filter bandwidth thus improves the rejection of the out of band signals, but at the same time the capture range decreases, pull in time becomes larger and phase margin becomes poor. 2.4.3 Pull in Time The total time taken by the PLL to capture the signal (or to establish the lock) is called as Pull in Time of PLL. It is also called as Acquisition Time of PLL. 2.4.4 Bandwidth of PLL Bandwidth is the frequency at which the PLL begins to lose the lock with reference. 2.5 Noises in PLL The output of the practical system deviates from the desired response. This is because of the imperfections and noises in the system. The supply noise also affects the output noise of the PLL system [12]. There are mainly 4 types of noises. They are explained below. 2.5.1 Phase Noise The phase fluctuation due to the random frequency variation of a signal is called as phase noise. This is mostly affected by oscillators frequency stability. The main sources of the phase noise in PLL are oscillator noise [12-15], PFD and frequency divider circuit. The main components of the phase noise are thermal and flicker noise. 2.5.2 Jitter A jitter is the short term-term variations of a signal with respect to its ideal position in time [16-19]. This problem negatively impacts the data transmission quality. Jitter and phase noise are closely related and can be computed one from another [18]. Deviation from the ideal position can occur on either leading edge or trailing edge of signal. Jitter may be induced and coupled onto a clock signal from several different sources and is not uniform over all frequencies. Excessive jitter can increase bit error rate (BER) of communication signal [19]. In digital system Jitter leads to violation in time margins, causing circuits to behave improperly. 2.5.3 Spur Non-desired frequency content not related to the frequency of oscillation and its harmonics is called as Spur. There are mainly two types of spur. They are reference spur and fractional spur. Reference spur comes into picture in an integer PLL while fractional spur plays a major role in fractional PLL. When the PLL is in lock state the phase and frequency inputs to the PFD are essentially equal. There should not be any error output from the PFD. Since this can create problem, so the PFD is designed such that, in the locked state the current pulses from the CP will have a very narrow width as shown in the Figure 2.9. Because of this the input control voltage of the VCO is modulated by the reference signal and thus produces Reference Spur [20]. 2.5.4 Charge Pump Leakage Current When the CP output from the synthesizer is programmed to the high impedance state, in practice there should not be any current flow. But in practical some leakage current flows in the circuit and this is known as charge pump leakage current [20]. 2.6 Applications of PLL The demand of the PLL circuit increases day by day because of its wide application in the area of electronics, communication and instrumentation. The recent applications of the PLL circuits are in memories, microprocessors, hard disk drive electronics, RF and wireless transceivers, clock recovery circuits on microcontroller boards and optical fiber receivers. Some of the PLL applications are mentioned below. 1.FrequencySynthesis A frequency synthesizer is an electronic system for generating a range of frequencies from a single fixed time base or oscillator. 2.Clock Generation Many electronic systems include processors of various sorts that operate at hundreds of megahertz. Typically, the clocks supplied to these processors come from clock generator PLLs, which multiply a lower-frequency reference clock (usually 50 or 100 MHz) up to the operating frequency of the processor. The multiplication factor can be quite large in cases where the operating frequency is multiple GHz and the reference crystal is just tens or hundreds of megahertz. 3.Carrier Recovery (Clock Recovery) Some data streams, especially high-speed serial data streams (such as the raw stream of data from the magnetic head of a disk drive), are sent without an accompanying clock. The receiver generates a clock from an approximate frequency reference, and then phase-aligns to the transitions in the data stream with a PLL. This process is referred to as clock recovery. 4. SkewReduction This is one of the very popular and earliest uses of PLL. Suppose synchronous pair of data and clock lines enter a large digital chip. Since clock typically drives a large number of transistors and logic interconnects, it is first applied to large buffer. Thus, the clock distributed on chip may suffer from substantial skew with respect to data. This is an undesirable effect which reduces the timing budget for on-chip operations. 5. Jitterand Noise Reduction One desirable property of all PLLs is that the reference and feedback clock edges be brought into very close alignment. The average difference in time between the phases of the two signals when the PLL has achieved lock is called the static phase offset. The variance between these phases is called tracking jitter. Ideally, the static phase offset should be zero, and the tracking jitter should be as low as possible. CHAPTER 3 CONVEX OPTIMIZATION OF VCO IN PLL 3.1 What is an optimization technique? Optimization technique is nothing but the finding of the action that optimizes i.e. minimizes or maximizes the result of the objective function. Optimization technique is applied to the circuits aiming at finding out the optimized circuit design parameter to achieve either the best performance or the desired performance. Optimization techniques are a set of most powerful tools that are used in efficiently handling the design resources and there by achieve the best result. Mainly optimization techniques are applied to the circuit for the selection of the component values, devices sizes, and value of the voltage or current source. 3.2 Types of circuit optimization method There are mainly four types of circuit optimization methods exist. They are Classical optimization Knowledge based optimization Global optimization method Convex optimization and geometric programming 3.2.1 Classical Optimization Methods: In case of analog circuit CAD, classical optimization methods [21], such as steepest descent, sequential quadratic programming, and Lagrange multiplier methods are mainly used. These methods are used with more complicated circuit models, including even full SPICE simulations in each iteration. This method can handle a wide variety of problem. For this there is a need of a set of performance measures and computation of one or more derivatives. The main disadvantage of the classical optimization methods is that the global optimal solution is not possible. This method fails to find a feasible design even one exist. This method gives only the local minima instead of global solution. Since many different initial designs are considered to get the global optimization, the method becomes slower. Because of the human intervention (to give good initial designs), the method becomes less automated. The classical methods become slow if complex models are used. 3.2.2 Knowledge-Based Methods: Knowledge-based and expert-systems methods such as genetic algorithm or evolution systems, systems based on Fuzzy logic, and heuristics-based systems have also been widely used in analog circuit CAD [21]. In case of knowledge based methods, there are few limitations on the types of problems, specifications, and performance measures that are to be considered. These methods do not require the computation of the derivatives. This is not possible to find a global optimal design solution using these methods. The final design is decided on the basis of the initial design chosen and the algorithm parameters. The disadvantage of the knowledge based methods is that they simply fail to find a feasible solution even when one may exist. There is a need of human intervention during the design and the training process. 3.2.3 Global Optimization Methods: Global optimization methods such as branch and bound and simulated annealing are also used in analog circuit design [21]. These methods are guaranteed to find the global optimal design solution. The global optimal design is determined by the branch and bound methods unambiguously. In each iteration, a suboptimal feasible design and also a lower bound on the achievable performance is maintained by this method. This enables the algorithm to terminate non-heuristically, i.e., with complete confidence that the global design has been found within a given tolerance. The branch and bound method is extremely slow, with computation growing exponentially with problem size. The trapping in a locally optimal design can be avoided by using simulated annealing (SA). This method can compute the global optimal solution but not guaranteed. Since there is no real-time lower bound is available, so termination is heuristic. This method can also handle a wide variety of performance indices and objects. T he main advantage of SA is that it handles the continuous variables and discrete variables problems efficiently and reduces the chances of getting a non-globally optimal design. The only problem with this method is that it is very slow and can not guarantee a global optimal solution. 3.2.4 Convex Optimization and Geometric Programming Methods: Geometric programming methods are special optimization problems in which the objective and constraint functions are all convex [22-24]. Convex optimization technique can solve the problems having a large number of variables and constraints very efficiently [22]. The main advantage of this method for which people generally adopt is that the method gives the global solution. Infeasibility is unambiguously detected. Since a lower bound on the achievable performance is given, so the method uses a completely non- heuristic stopping criterion. 3.3 Geometric programming and convex optimization Geometric programming is a special type of optimization technique in which all the objective must be convex. Before applying this technique it has to confirm that whether the given problem is convex optimization problem or not. Convex optimization problem means the problem of minimizing a convex function subject to convex inequality constraints and linear equality constraints. In IC integration convex optimization and geometric programming has become a more efficient computational tool for optimization purpose. This method has an ability to handle thousands of variables and constraints and solve efficiently. The main advantage of convex optimization technique is that it gives the global optimized value and the robust design. The fact that geometric programs can be solved very efficiently has a number of practical consequences. For example, the method can be used to simultaneously optimize the design of a large number of circuits in a single large mixed-mode integrated circuit. The de signs of the individual circuits are coupled by constraints on total power and area, and by various parameters that affect the circuit coupling such as input capacitance, output resistance, etc. Convex optimization is used to find out the optimized value of these parameter and sizing of the devices in the circuit [25]. Another application is to use the efficiency to obtain robust designs i.e., designs that are guaranteed to meet a set of specifications over a variety of processes or technology parameter values. This is done by simply replicating the specifications with a (possibly large) number of representative process parameters, which is practical only because geometric programs with thousands of constraints are readily solved. A real valued function fx defined on an interval (space) is called convex if ftx1+1-tx2tfx1+1-tfx2 (11) For every t,0t1 and x1x2 In the Figure 3.1 function fx is represented as a convex function on an interval. The convex optimization problem is in the form of minimize f0x Subjected to fix1 , i=1, 2, 3, m gix=1 , i=1, 2, 3, p xi1 , i=1, 2, 3, n Where fix is a posynomial function gix is a monomial function Let x1,x2xn be n real positive variables. We can denote the vector (xi,xi.xi) of these variables asx. A function f is called a posynomial function of x if it has the form fix1,x2xn=k=1tCkx11kx22k..xnnk (12) Where Cj0 and ij R. The coefficients Cj must be nonnegative but the exponents ij can be any real numbers including negative or fractional. When there is exactly one nonzero term in the sum i.e. t=1 and C10, we call f is a monomial function. 3.3.1 Advantages: Handle thousands of variables and constraints and solve efficiently. Global optimization can be obtained. 3.3.2 Disadvantages: * Strictly limited to types of problems, performance specification and objectives that can be handled. 3.4 Optimization of the VCO circuit In my earlier design of the VCO circuit, the sizes of all the five inverter stages are same. Now the convex optimization technique is applied to find out the optimal scaling ratio of the different inverter stages to get the optimal design with a better performance. There are 5 inverter stages and the design has to give a delay of 100ps. The load capacitance of the VCO circuit is 65 fF. All these design constraints are formulated and applied to the convex optimization technique. Mainly optimization techniques are applied for selection of component values and transistor sizing. In this work I have used the geometric programming technique to find out the optimized scaling ratio of the different stages in CSVCO to meet the desired center frequency with lesser deviation. Let xi is the scaling ration of the ith stage, CL is the load capacitance, and D is the total delay of the inverter stages then optimization problem is in the form of Minimize sum (xi) Subjected to CLCLmax DDmax Where CLmax and Dmax are required design parameters and has a constant value. CHAPTER 4 DESIGN AND SYNTHESIS OF PLL 4.1 Design Environment The schematic level design entry of the circuits is carried out in the CADENCE Virtuoso Analog Design Environment. The layout of the PLL is designed in Virtuoso XL using GPDK090 library. In order to analyze the performances, these circuits are simulated in the Spectre simulator of CADENCE tool. Different performance indices such as phase noise, power consumption and lock time are measured in this environment. Transient, parametric sweep and phase noise analyses are carried out in this work to find out the performances of the circuit. The optimization of the current starved VCO circuit, the scale factor for transistor sizing is found out using the MATLAB environment. 4.2 Design Procedure 4.2.1 VCO Design Since VCO is the heart of the whole PLL system, it should be designed in a proper manner. The design steps for the current starved VCO are as follows. Step 1 Find the value of the propagation delay for each stage of the inverter in the VCO circuit using the following equation. p=1Nf (13) Where p= phl= plh= half of the propagation delay time of the inverter N= no of inverter stages f= required center frequency of oscillation Step 2 Find the WL ratio for the transistors in the different inverter stages using the equation in below. WL n=CloadphlnCoxVdd-VT,n2VT,nVdd-VT,n+ln4Vdd-VT,nVdd-1 (14) WL p=CloadplhpCoxVdd-VT,p2VT,pVdd-VT,p+ln4Vdd-VT,pVdd-1 (15) Step 3 After finding the WL ratio, find the values for W and L. Step 4 Find the value of the total capacitance form the expression Ctot=52Cox(LpWp+LnWn) (16) Where Cox is the oxide capacitance Lp,Wp,Ln,Wn is the width and length of the PMOS and NMOS transistors in the inverter stages. Step 5 Calculate the value of drain current for the center frequency which is given by IDcenter=NCtotVddf (17) Step 6 Find the WL ratio for the current starving transistors in the circuit from the drain current expression which is represented as WL n=2IDcenternCoxVgs-VT,n2 (18) Similarly WL p=2.5WL n (19) 4.2.2 Design of Phase Locked Loop The value of the charge pump current and the component parameters of the loop filter play a major role in the design of the phase locked loop circuit. The value of the lock time mainly depends upon these parameters. So while designing the circuit proper care should be taken in calculating these parameters. For the given values of reference(Fref) and output frequency(Fout) as well as the lock in range, the following steps to be carried out in designing the filter circuit. Step 1 Find the value of the divider circuit to be used which is given by n=FoutFref (20) Step 2 Find the value of the natural frequency (n) from the lock in range as given below lock in range=2n (21) Step 3 Find the value of the charge pump gain (KPDI) from the charge pump current used in the circuit which is given by KPDI=Ipump2 (Amps/radian) (22) Step 4 Find the value of the gain of the VCO (Kvco) circuit from the characteristics curve using the following expression. Kvco=fmax-fminVmax-Vmin (Hz/V) (23) Step 5 Find the values of the loop filter component parameters using the following expressions. C1=KPDIKvcoNn2 (24) C2=C110 (25) R=2nC1 (26) 4.3 Design Specifications and Parameters 4.3.1 VCO Design Specification The current starved VCO design specifications are mentioned in the following table. Parameter Value Center frequency 1GHz No. of inverter stage 5 Inverter delay 100ps Load capacitance 65fF Supply voltage 1.8V Table 1 VCO design specifications 4.3.2 VCO Design Parameters Parameter Value Width of Current starved PMOS(WPCS) 2.33m Width of Current Starved NMOS(WnCS) 140nm Width of PMOS in Inverter(WP) 2.44m Width of NMOS in Inverter(Wn) 150nm LPCS = LnCS = LP = Ln = L 100nm Table 2 List of design parameters of the CSVCO circuit 4.3.3 PLL Design Parameters The whole PLL system design specifications and parameters are shown in the Table 3. Parameter Value Reference frequency((Fref) 500 MHz output frequency(Fout) 1 GHz Lock in range 100 MHz Supply voltage 1.8 V Divider circuit By 2 Charge pump current(Ipump) 600 A Capacitor (C1) 15 pF Capacitor (C2) 1.5 pF Resistor (R) 1.384 K Table 3 PLL design specifications and parameters CHAPTER 5 SIMULATION RESULT AND DISCUSSION 5.1 Phase Frequency Detector The Pass Transistor DFF PFD circuit is shown in Figure 5.1. The PFD is same as to a dynamic two-phase master-slave pass-transistor flip-flop. The clock skew is minimized by using single edge clocks. In this design synchronous reset is used for master while asynchronous reset is used for slave. i.e., the reset is allowed only when the slave latch is transparent. The operating range of the design is increased with the help of synchronous resetting and also the power consumption is reduced compared to the traditional PFD. If the master latch is reset while it is transparent, then there will be significant short-circuit current will produce, resulting in more power. The output of the PFD when Fref signal rising edge leads Fin signal rising edge and vice versa is shown in the Figure 5.2 and Figure 5.3 respectively. 5.2 Charge Pump and Loop Filter When the reference signal clock edge leads the feedback clock edge, the UP signal of the PFD goes high. So to make both the clock have rising edge at the same time the VCO output signal frequency has to be increased. For this purpose an increase in control voltage is needed from the output of charge pump and loop filter circuit. The simulation result which is shown in the Figure 5.4 below gives an increase in the control voltage at the output of the loop filter circuit. From the Figure 5.4 its clear that the control voltage increases for a period during which the UP signal of the PFD remains high. In the other case a decrease in the control voltage is produced at the output of the filter circuit which is shown in the Figure 5.5. When the rising of feedback signal leads the reference signal rising edge the control voltage decreases for the period during which the DOWN signal of the PFD remains high. 5.3 Voltage Controlled Oscillator 5.3.1 Result using traditional method The heart of the PLL circuit is the voltage controlled oscillator. The circuit is designed to give a center frequency of oscillation of 1 GHz. The frequency of oscillation of the output signal for the different input control voltage is mentioned in the Table 4. The center frequency of oscillation at an input control voltage of VDD/2 is 1.012 GHz. The output signal of the VCO at a control voltage of VDD/2 is shown in the Figure 5.6. Control Voltage (VC)(in volt) Frequency of Oscillation (f) (in MHz) 0.103 24.415 0.154 50.929 0.206 91.05 0.257 139.32 0.309 188.179 0.36 234.277 0.411 282.125 0.463 342.256 0.514 412.889 0.566 489.48 0.617 569.178 0.669 650.037 0.720 731.72 0.771 812.946 0.823 893.63 0.874 973.461 Control Voltage Frequency of Oscillation 0.926 1051.851 0.977 1128.02 1.03 1200.67 1.08 1271.818 1.13 1338.398 1.18 1401.32 1.23 1460.798 1.29 1517.121 1.34 1570.371 1.39 1620.798 1.44 1668.416 1.49 1713.913 1.54 1757.073 1.59 1798.081 1.65 1836.986 1.7 1873.865 1.75 1909.109 1.8 1943.021 Table 4 Oscillating frequency of the VCO output signal for different control voltage The VCO characteristics curve is shown in the Figure 5.7. The X-axis of the curve represents the input control voltage while the Y-axis represents the corresponding frequency of oscillation. The gain of the CSVCO circuit is 1.531 GHz/V. The phase noise of the VCO in the schematic level is found to be -82.87 dBc/Hz. The phase noise plot for schematic level is shown in the Figure 5.8. The layout of the 5 stage current starved VCO is shown in the Figure 5.9. The schematic and post layout level simulation results are compared in the Table 5. Parameter Schematic Result Post-Layout Result Frequency(f) 1.012 GHz 1.00256 GHz Frequency Deviation(f) 12 MHz 2.56 MHz Power(P) 432.456 W 480.63 W Phase Noise @1MHz offset -82.7 dBc/Hz -84.88 dBc/Hz Table 5 Comparison of schematic and post layout level simulation results 5.3.2 Result using convex optimization method Using convex optimization method the scaling ratio is found out to satisfy the center frequency of oscillation (i.e. delay of the circuit) from the MATLAB environment. The scaling ratio for different stages of the inverter in the VCO is 1,1,1,1 and 1.4058. The scaling ratio result is shown in the Figure 5.10. Now the transistor sizes are modified according to the scaling ratio. Since the scaling factor of all the stages are 1 except 5th stage, so the transistor sizing of the 5th stage has only changed to get the better frequency precision. The sizes of the transistors of CSVCO optimized using convex optimization technique are listed out in the Table 6. Before optimization the centre frequency of the oscillation is found out 1.012GHz. And after applying the convex optimization and geometric programming to this circuit, the centre frequency of oscillation is 1000.0457MHz. So the frequency deviation from its centre frequency is reduced to .00457% from 1.2%. The performance of CSVCO for both traditional and geometric programming is compared in the Table 7. The comparison of control voltage versus oscillating frequency characteristics of the CSVCO circuit is shown in the Figure 5.11. Stage Parameter value 1 WPCS WnCS WP Wn 2.33m 140nm 2.44m 150nm 2 WPCS WnCS WP Wn 2.33m 140nm 2.44m 150nm 3 WPCS WnCS WP Wn 2.33m 140nm 2.44m 150nm 4 WPCS WnCS WP Wn 2.33m 140nm 2.44m 150nm 5 WPCS WnCS WP Wn 3.28m 195nm 3.435m 215nm Table 6 Size of the transistors of CSVCO circuit after optimization Factor CSVCO using traditional method CSVCO using convex optimization method Frequency(f) 1.012GHz 1.0000457GHz Frequency Deviation(f) 12MHz 45.7KHz Power(P) 432.456W 539.65W Phase Noise @1MHz offset -82.7 dBc/Hz -82.6 dBc/Hz KVCO 1.531GHz/V 1.5926GHz/V Table 7 Performance comparison of CSVCO designed using traditional method and convex optimization 5.4 Frequency Divider The circuit diagram of a pass transistor based DFF frequency divider circuit is shown in the Figure 5.12. The circuit divides the frequency by a factor of 2. The simulation result of the divide by 2 circuits is shown in the Figure 5.13 5.5 Phase Locked Loop The output of the charge pump and loop filter circuit i.e. the control voltage will maintain a constant value when the references signal and feedback signal are in lock. The control voltage of PLL for the schematic level is shown in the Figure 5.14. From the Figure 5.14 its clear that the control maintains the constant value of 0.9 V at time 280.6 ns. So the lock time of PLL is 280.6 ns. The layout of the PLL is shown in the Figure 5.15. The most of the area of the PLL is consumed by the resistor and capacitor used in the filter network. Different signals like UP, DOWN, Control Voltage, reference signal and feedback input signal of the PLL in the lock state are shown in the Figure 5.16 and Figure 5.17 for schematic level and post layout level respectively. From the Figure 5.16 and 5.17 its clear that when the control voltage is constant, the reference signal and the feedback input signal are almost similar as their phase and frequency are approximately same. The phase noise analysis of the PLL is carried out both in the schematic as well as in the post layout level. The phase noise is found to be -86.21 dBc/Hz and -101.7 dBc/Hz in schematic and post layout level respectively. The phase noise variation of the PLL both in schematic and post layout level simulation are shown in the Figure 5.18 and 5.19 respectively. The performance comparison of the PLL both in schematic and post layout level simulation are mentioned in the Table 8. Parameter Result of Schematic Level Simulation Result of Post Layout Level Simulation Technology 90 nm 90 nm VDD 1.8 V 1.8 V Lock Time 280.6 ns 345.5 ns Frequency 1 GHz 1 GHz Maximum Power Consumption 11.9 mW 10.408 mW Phase Noise @ 1MHz offset -86.21 dBc/Hz -101.7 dBc/Hz Table 8 Performance comparison of PLL circuit CHAPTER 6 CONCLUSION AND FUTURE WORK In this work a PLL with a better lock time is presented. The lock time of the PLL is found to be 280.6 ns. The PLL circuit consumes a power of 11.9 mW from a 1.8 V D.C. supply The lock time of the PLL mainly depends upon the type of PFD architecture used and the parameters of the charge pump and loop filter. So by properly choosing the PFD architecture and adjusting the charge pump current and the loop filter component values a better lock time can be achieved. The centre frequency of oscillation of the VCO depends upon the sizing of the transistors. The frequency deviation from the desired value can be reduced by properly choosing the transistor sizes. By applying the convex optimization technique with frequency of oscillation as the main objective function, the deviation of oscillation frequency is minimized to 0.00457% from 1.2%. Here the convex technique to find out the transistor sizing to meet only the desired frequency specification. The other constraints like area, power and phase noise can also be applied.

What do visual hallucinations tell us about the nature of...

What do visual hallucinations tell us about the nature of consciousness? The term ‘hallucination’ is difficult to define. There is a fine line between a ‘hallucination’ and an ‘illusion’. A hallucination differs from an illusion in that illusions are a product of misinterpretations of external stimuli whereas hallucinations need no such requirement making them an entirely internal process. A true hallucination can also be distinguished from a pseudo-hallucination in which the individual can recognise that what they’re seeing or hearing is not real. Hallucinations are also different from voluntary mental imagery, in that the thought has not uncontrollably forced itself onto our minds. Slade and Bentall (1988, cited in Blackmore, 2010)†¦show more content†¦The best way to induce hallucinations, or where they occur the most, is through sensory deprivation. Charles Bonnet Syndrome (CBS) is a common condition among people who have lost their sight in which they suffer visual hallucinations. Many studies ha ve looked at the syndrome in order to provide a better understanding of visual hallucinations. One study exhibited a 64-year-old blind woman suffering from complex visual hallucinations (McNamara, Heros, Boller, 1982). It was found that neurosurgical removal of a large suprasellar meningioma helped remove her hallucinatory experiences. Such a case study provides evidence that hallucinations are related to both a sensory deprivation and an impairment in CNS functioning. Another study claimed that, through looking at patients suffering from CBS, the hallucinations were due to an interruption in the visual association areas of the cerebral cortex. The researchers suggested that hallucinatory experiences could terminate on improving visual function or addressing social isolation (Menon, Rahman, Menon, Dutton, 2003). Deprivation of hearing can also induce hallucinations. Sometimes the deaf hear hallucinated sounds – they may even hear whole orchestras playing. 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Gatsby free essay sample

# 8217 ; s Pursuit Of The American Dream Essay, Research Paper Gatsby # 8217 ; s Pursuit of the American Dream The Great Gatsby is about the American Dream, and the diminution of people who attempt to make the dream like end. The effort to make the American dream is a common subject in many films that have been produced. This dream is different for different people, but in The Great Gatsby Jay believes that the beginning of felicity is money. Jay Gatsby is a character who fundamentally lives in the yesteryear. Through this movie he devotes most of his grownup life seeking to recapture it and, eventually, dies seeking to trail it. In the yesteryear, Jay had a love matter with the really rich and posh Daisy. He knew he could non get married her because of the difference in their societal position, so he left to go the image she desired. Once he eventually achieves this wealth, he moves across the lake from Daisy, and throws tremendous expensive parties, trusting by opportunity she might demo up at one of them. We will write a custom essay sample on Gatsby or any similar topic specifically for you Do Not WasteYour Time HIRE WRITER Only 13.90 / page Although he does non wish to go to his parties but tickers them from his window. When this dream doesn # 8217 ; t work, he asks around casually if anyone knows her. Soon he meets Nick Carraway, a cousin of Daisy, who sets up a meeting. Gatsby? s position of the American dream is one in which that he thinks that he can acquire anything that he wants. I think that this might be considered an extension of the American dream. Subsequently in the film when they go in the Hotel, Jay still thinks that Daisy loves him. You truly detect this when he takes the incrimination for killing the gas station proprietors married woman. He besides watches and protects Daisy when she is at place after the violent death. Jay can non acc ept the fact that the yesteryear is gone and done with. Jay is still certain that he can accomplish his dream with wealth and power. I think that Nick is the lone 1 that truly understands Jay through out the movie. The apprehension that dent has is that Jay has non become wealth and powerful for himself. His true dream was to go affluent, and to utilize it as a vehicle to acquire back Daisy. Gatsby does non halt at anything until his American Dream is fulfilled. However, it neer comes true, and he ends up paying the ultimate monetary value for it. The thought of the American Dream still remains true to this twenty-four hours. Everyone wants what they can non hold and some will endeavor to any lengths possible. Gatsby is a perfect illustration of this insane thrust for the American Dream. There is a ruin to the American dream and it is far from perfect. Society seems to interrupt up into separate societal groups over clip. Peoples of lower position ever think that their jobs can be solved if they gain adequate wealth to suit in with the upper crust. Many think the American Dream is a door to high societal position and when they reach this point they think that their concerns about money disappear. Money, power, and societal position are non the lone portion of the American dream. Jay Gatsby fails to make his concluding dream of love for Daisy so alternatively he follows a life of utmost wealth. My honest sentiment of the movies reading of the American Dream is exaggerated by utmost wealth. I think that the characters were disgusting in the manner that their behaviours were portrayed. However, I am positive that these same attitudes towards the lower category still occur everyday.

What Is The Best Alternative To Prison Essays - Penology

What Is The Best Alternative To Prison? ?The U.S. prison population has tripled since 1980 so that on any given day there are 1.5 million Americans behind bars.? (Alternatives 1). There is a clear overcrowding problem in todays prisons. Why? I believe that the population explosion in the prison system is due to the increasing moral decline of America. Prisons should keep dangerous criminals off the streets and keep others from committing a crime. (Prisons 1) One would think that being locked up is to be feared. But in today?s society, criminals simply do not care. ?Incarceration is not effective in crime reduction? (Alternatives 1). But what can be done to fix this ever growing epidemic? More prisons can always be constructed, right? Building more jails is expensive and does not solve the problem. (Prisons 1) So we must now search for plausible alternatives to incarceration. First of all, there is the option of only putting violent criminals in jail. Non-violent criminals could be put into work programs. (Prisons 2) They could spend their days cleaning and repairing America?s highways and national parks. This, in my opinion is an excellent idea! Yet we still have to deal with the violent criminals. There are some different options in punishing those individuals. ?Early release programs let prisoners out of jail before their sentence is complete. This promotes good behavior in prison and keeps the prison population lower. However, many released prisoners just commit another crime and are returned to jail? (Prisons 1). Early release seems as though it would work wonderfully, but alas falls short. I think that prisoners should not be released early, or at all for that matter. They should serve out their complete term. If parole were not an option, maybe someone would think twice before they pull the trigger. And for those who don?t take heed, they would be locked up where they belong. The last option is by far the best in my eyes. ?Before the abolition of slavery there was no real prison system in the United States. Punishment for crime consisted of physical torture referred to as corporal or capital punishment? (Browne 2). Doesn?t sound too bad to me. I believe that the punishment should fit the crime. If a man beats his wife to death, he in turn should be beaten to death. My solution to the prison problem is a simple yet harsh one. An eye for an eye. By the way, what ever happened to cutting your hand off for stealing? Bibliography ?Alternatives to Prison.? 2 Feb. 2000. Browne, Julie. ?The Labor of Doing Time.? 2 Feb. 2000. ?Prisons Do Not Work.? 2 Feb. 2000.

European Settlers in the New World essays

European Settlers in the New World essays Title: Fell, Barry. America B.C.: European Settlers in the New World. New York: Quadrangle/New York Times Book Co., 1976. Author: Howard Barraclough Fell (1917-1994). Fell is an accomplished marine biologist from Harvard, also became the professor of comparative zoology at Harvard. An interest in languages and societies encouraged him to teach himself most the languages he knew. His controversial interpretations often served only to enrage mainstream archaeologists. Scope: In this book, Fell lays out the evidence showing that there were numerous pre-Columbian contacts between Europe, Africa, and Asia and the New World going back at least three thousand years. Thesis: This book rounds up a wide range of epigraphic material which he claims demonstrated settlement by a variety of West European and Mediterranean voyager. Summary: The inscriptions are written in various European and Mediterranean languages. They speak of visits from ancient ships and of permanent colonies of Celts, Basques, Libyans, and even Egyptians. These findings came to light in 1975 in the course of an archeological survey of New Hampshire and Vermont. The book states that three thousand years ago bands of roving Celtics crossed the North Atlantic to discover North America. Phoenician traders came to join with the Egyptian miners and became the Wabanaki tribe, these people wrote in ancient Celtic alphabet called Ogam. As one historian, Professor Norman Totten, has pointed out, it means that 2,500 years of American prehistory must now be transferred to history; for history begins when writing begins. You can infer from the writings that the colonists intermarried with the Amerindians and so their descendants still live today. Conclusion: Before I read this book, my knowledge of pre-Columbian discoveries of the Americas was limited to what we discussed in class. After reading this book, I have been enlightened to many ...

Assignment Week 2 Essays

Assignment Week 2 Essays Assignment Week 2 Essay Assignment Week 2 Essay Associate Level Material Appendix B Ethical Theories Chart Complete the chart below using information from the weekly readings and additional research if necessary. Include APA formatted in-text citations when applicable and list all references at the bottom of the page. |Ethical Theory | | | | | | | | | | |Utilitarianism |Deontological |Virtue ethics | | | |Definition | |Making choices that determine the sole |Describes the character of a moral agent as | | |A consequentialist theory in a |purpose of morally required, forbidden, or|a driving force for ethical behavior rather | | |normative ethics holding that the |permitted. |than by rules, consequences, or social | | |right decision making is the one | |context. | | |that maximizes overall happiness. | | | | | | | | | | | | | | | | | | | | | | | |Ethical thinker associated with| |Highly ethical person (The Germans who hid|Aristotle | |theory |Stakeholders (the involving |the Jewish family from the Naziâ„ ¢s) Corrie | | | |parties affected in the decision) |ten Boom | | | | | | | | |Mark Felt | | | | | | | | | | | | | |Decision-making process | |In order to make a decision, an individual|An individual will make a moral decision | | | |must examine the choices through a moral |based on the personâ„ ¢s professional | | |The decision making process is to |compass. |association, the regulatory community, their| | |think about all the stakeholders | |religious community, family, society, and/or| | |that can be affected by the | |the companyâ„ ¢s ethics office. | | |decision. Making sure the person | | | | |determine their decision by the | | | | |moral worth of an action based on | | | | |the resulting outcome. Think about| | | | |the societal harms and benefits of| | | | |an action. | | | | | | | | | | | | | | | | | | |Workplace example | |An employee has been overworked for the |A customer left their wallet. Company policy| | |An employee was spotted by another|last two days. The employee need the hours|states to report any lost and found | | |employee stealing baby pampers |but is too tired to focus. The manager |merchandise. The morally and ethical thing | | |from the company. Before making |made the decision to let the employee stay|would be to turn the wallet in. The | | |the decision of reporting the |on the clock, but go to the break room and|temptation that will be wrong in this | | |employee think if the outcome will|rest for thirty minutes. It is against |situation will be to take the money and | | |be better for overall harm |company policy to ride the clock. |throw away the wallet. Because of the | | |/benefit. | |religious beliefs I would turn the wallet | | | | |in. | | | | | | | | | | | | | | | | | | Reference: DECIDING WHATâ„ ¢S RIGHT: A PRESCRIPTIVE APPROACH, Trevino, L., Nelson, K. (2011).?  Managing business ethics: Straight talk about how to do it right?  (5th ed.). Ch. 2 pp.38-51, Hoboken, NJ: Wiley.

Analyze the development of global careers and the role of Essay

Analyze the development of global careers and the role of International assignments - Essay Example The constituents of global careers are both intrinsically and extrinsically established on the basis of both the individualistic and the organizational perspectives. Career paths are determined by informal norms and well aided developments that create and illustrate a positive link between the traditional factors and the career capital formations of the individuals in an international organization. Arthur et al, (1995) explains that developing leaders whose key objective is to develop better managerial capabilities including being able to efficiently run global organization is a fundamental factor determining the human resource priority in major organizations. Arguably, Black et al, (1991) explore the critical challenges that international face in the process of executing their obligations. Further submissions by Bonache et al, (2001) indicate that managing global talents provide consistence and support an in-depth understands of the external businesses. The organizational integral p art involves global management approach which is evidently based on increased cost management. Ideally, the issues that involve substantial risks, career developments and applicable cultural variations have influenced business trends in the last decades. For better business growth strategies, geographic operations are thought to be consistent with the traditional and modern global career paths. Global career programs are vital and ultimately necessary for organizational advancements, and at various levels, their role is valid and ultimately necessary for employees who are in need of better training. 1.1 Literature Review 1.1.1 Overview Despite the various problems faced by organizations, there is an important belief in gained experience including the need to explore and manage global competition. In this case, a high level competence is ideal and a fundamental necessity. The scope of this literature is determined by exploring the levels of training, selection, preparation as well as adjustment and performance composition, (Black, 1991). With respect to the global career development, the organizational dynamics involve generating sustainable roles, as well as ensuring that adequate career choices are factored for the international assignments. Firstly, the research component should involve a research experimentation process justified by developing the assignment specification, (Bonache et al, 2001). Although organizations provide ideal funding for their skill development initiatives, developing better career objectives would also involve global career progression policies. Both Evans et al, (2002) and Hall, (2002) outlines several developmental goals aiding global competence including their specific impact on an insightful developments. The mainstream consideration for the HR managers is validly explained by the international assignment position, including highly divisive goal ranking experience. However, the link between career experience and career progressio n is complexly enhanced by a growing individual variation, and hence this also creates a

Series-Parallel Circuit Essay Example | Topics and Well Written Essays - 1250 words

Series-Parallel Circuit - Essay Example Rather, it contains elements of both. The current exits the bottom of the battery, splits up to travel through R3 and R4, rejoins, then splits up again to travel through R1 and R2, then rejoins again to return to the top of the battery. There exists more than one path for current to travel (not series), yet there are more than two sets of electrically common points in the circuit (not parallel). Because the circuit is a combination of both series and parallel, we cannot simply apply the rules for voltage, current, and resistance. For instance, if the above circuit were simple series, we could just add up R1 through R4 to arrive at a total resistance, solve for total current, and then solve for all voltage drops. Likewise, if the above circuit were simple parallel, we could just solve for branch currents, add up branch currents to figure the total current, and then calculate total resistance from total voltage and total current. However, this circuit's solution will be more complex. To calculate the different values for series-parallel combination circuits, we'll have to be careful how and where we apply the different rules for series and parallel. Ohm's Law, of course, still works just the same for determining values. And then, we become able to identify which parts of the circuit are series and which parts are parallel, we can... Likewise, if the above circuit were simple parallel, we could just solve for branch currents, add up branch currents to figure the total current, and then calculate total resistance from total voltage and total current. However, this circuit's solution will be more complex. To calculate the different values for series-parallel combination circuits, we'll have to be careful how and where we apply the different rules for series and parallel. Ohm's Law, of course, still works just the same for determining values. And then, we become able to identify which parts of the circuit are series and which parts are parallel, we can analyze it in stages, approaching each part one at a time, using the appropriate rules to determine the relationships of voltage, current, and resistance Note: The rules of series and parallel circuits must be applied selectively to circuits containing both types of interconnections. Technique Analysis The goal of series-parallel resistor circuit analysis is to be able to determine all voltage drops, currents, and power dissipations in a circuit. The general strategy to accomplish this goal is as follows. Step 1: Assess which resistors in a circuit are connected together in simple series or simple parallel. Step 2: Re-draw the circuit, replacing each of those series or parallel resistor combinations identified in step 1 with a single, equivalent-value resistor. Step 3: Repeat steps 1 and 2 until the entire circuit is reduced to one equivalent resistor. Step 4: Calculate total current from total voltage and total resistance (I=E/R). Step 5: Taking total voltage and total current values, go back to last step in the circuit reduction process and insert those values where applicable. Step 6: From known

Dirt Bikes Usa Project Essay Example for Free

Dirt Bikes Usa Project Essay * How does e-mail benefit an organization? Why might an organization want to limit how an employee uses e-mail during work hours? What is an e-mail’s path once it leaves an organization? Companies have increased productivity, decreased costs and found new marketing methods using email to attract new customers and keep previous ones up to date on product changes, information sales etc. This helps a work group to communicate to each other affectively and easily keeping all party’s up to date. The advantages of email in business can be seen in small and large organizations. Due to the fast speed of the Internet this allows businesses to work at a faster pace and communicate more effectively. Decreased cost and speed is some of the business advantages of using email. A business might want to limit how an employee’s uses email during work hours to prevent lawsuits from someone outside the company and by not using emailing for personal use during business hours would bring up better productivity from the employees. There is a cost savings as well because of employees may receive an email message that was infected with a virus and when it is opened it then spreads to the computer and then to the network that infects all the other workstations. Some of these email viruses also send messages back out by using your contact/address book. This costs the company as they try and control the virus and ensure none of the other workstations get infected. An emails path, after it leaves an organization, is usually meant to go to a certain person or persons, but can end up spread throughout the internet by hackers. This is non-encrypted text that is routed from your organization back to their Internet provider through routers and hubs that typically routes to other internet providers and back to the person or persons. Since there are so many locations a hacker can capture your open email message and use it wrongly. * What is the effect of instant messaging on organizational networks? What are benefits and drawbacks of using instant messaging in an organization? Instant messaging helps an organization that is spread out to different floors, locations or states as most of them tell you if the person is signed on and working, in a meeting or away from their desk. This not only helps as send a quick message via instant messaging is faster than email but it also lets you know if the person is available to actually read it once it arrives. The draw backs of using instant messaging in an organization could allow employees to use inappropriate langue and could allow someone to harass other employees. Typically if an organization uses instant messaging they also monitor it and have rules stated in there Information Security Policy. * What are benefits and drawbacks of Web page and search engine use in an organization? Should managers monitor employee e-mail and Internet usage? Why or why not? The benefits of web pages and search engines are that a business can put research into projects, create revenue with their own web page as an advertisement adding detail about the organization. On the other hand a drawback would be that employees have access to misuse these search engines and web pages. This could also affect the persons job performance as they are busy surfing the internet instead of working on the assigned tasks. This is typically also noted in the Information Security policy to help guide employees so they don’t get them self in to trouble. As a company resource that costs managers should monitor employee e-mail and Internet usage to ensure that they are not being abused. Most business know have audit requirements and those personal messages you send would end up taking space up that costs money to the organization to store copies of these for legal and audit purposes.

A Personal Philosophy of Music Education Essay -- Teaching Education E

A Personal Philosophy of Music Education Few would argue against the idea that we educate ourselves and our society so that we have adequate means with which to understand and interact with elements of the world around us. Subjects such as mathematics, language, history, and the hard sciences are granted immediate and unquestioned legitimacy in our schools, and with good reason. We encounter each of these elements of our lives on a daily basis. We need to have an understanding of these disciplines in order to interact with them, otherwise they are meaningless to us. I submit that the same can be said for the fundamental concepts of music. Music is something that we encounter in our society every day. It surrounds us. Indeed it would be practically impossible to escape. Like so many other naturally occurring phenomena, a discipline has been developed over centuries to help us interact with music, and that discipline is what I and those of my profession are charged with teaching. Before addressing the need for music instruction in our schools I would like to briefly examine the need for education of any kind. Education is a means of making sure our society has a given set of knowledge. The set of knowledge we perceive ourselves as needing changes based on our surroundings and the issues we are dealing with. In American education's early history we perceived ourselves as needing a set of knowledge that included a common language and common view of history, as well as knowledge of those things with which we would interact every day. In many ways early public education was more a means of social control than an altruistic endeavor. In today's climate we see ourselves as having more diverse needs in our education... ...ure we have a musically literate society. There are many more examples of this commitment throughout our history. Essentially I believe that in today's society music literacy is a necessary skill for us all to have to successfully encounter and interact with the world around us. Reasons for teaching music as a school subject are consistent with the reasons that we educate ourselves about anything else. Furthermore, we have shown a commitment in the past to creating a musically literate society, and events in today's world only strengthen the need to continue that commitment. Works Cited Lebuta, Joseph A. & Smith, Deborah A. Music Education: Historical Contexts and Perspectives. (1997) Upper Saddle River, NJ. Prentice Hall. Lehman, Paul R. et all. The School Music Program: A New Vision. (1994). Reston, VA. Music Educators National Conference. A Personal Philosophy of Music Education Essay -- Teaching Education E A Personal Philosophy of Music Education Few would argue against the idea that we educate ourselves and our society so that we have adequate means with which to understand and interact with elements of the world around us. Subjects such as mathematics, language, history, and the hard sciences are granted immediate and unquestioned legitimacy in our schools, and with good reason. We encounter each of these elements of our lives on a daily basis. We need to have an understanding of these disciplines in order to interact with them, otherwise they are meaningless to us. I submit that the same can be said for the fundamental concepts of music. Music is something that we encounter in our society every day. It surrounds us. Indeed it would be practically impossible to escape. Like so many other naturally occurring phenomena, a discipline has been developed over centuries to help us interact with music, and that discipline is what I and those of my profession are charged with teaching. Before addressing the need for music instruction in our schools I would like to briefly examine the need for education of any kind. Education is a means of making sure our society has a given set of knowledge. The set of knowledge we perceive ourselves as needing changes based on our surroundings and the issues we are dealing with. In American education's early history we perceived ourselves as needing a set of knowledge that included a common language and common view of history, as well as knowledge of those things with which we would interact every day. In many ways early public education was more a means of social control than an altruistic endeavor. In today's climate we see ourselves as having more diverse needs in our education... ...ure we have a musically literate society. There are many more examples of this commitment throughout our history. Essentially I believe that in today's society music literacy is a necessary skill for us all to have to successfully encounter and interact with the world around us. Reasons for teaching music as a school subject are consistent with the reasons that we educate ourselves about anything else. Furthermore, we have shown a commitment in the past to creating a musically literate society, and events in today's world only strengthen the need to continue that commitment. Works Cited Lebuta, Joseph A. & Smith, Deborah A. Music Education: Historical Contexts and Perspectives. (1997) Upper Saddle River, NJ. Prentice Hall. Lehman, Paul R. et all. The School Music Program: A New Vision. (1994). Reston, VA. Music Educators National Conference.

Leasership and Social Organization in Europe Essay

In Europe, most of the area used one main social structure. This is represented in my first pyramid. As you can see the kings are the most powerful, next come the nobles, then the knights, and finally the peasants. The box that has the word â€Å"church† in it to the side means that they had as much power as the kings and nobles. This society was based on the feudal system. It was mainly constructed for one reason, which was security. It was possible for everyone to move higher up the ranks of the pyramid. This is what most people aspired to do. England had a different social structure than this. It was made up of nobility at the top, next came the knights, then the largest class of population, the villanis, and finally the lowest class, the bordars. The two social structures were alike because they both had to do with the process of giving and keeping pieces of land to workers. The nobility played a big role in both social structures too. In the late middle ages, they wanted to centralize power so they expanded royal domain, set up systems of royal justice, organized government bureaucracies, built standing armies, and developed tax systems. This was very beneficial to Europe. These particular systems were probably in place because they were simple and easy to follow. In my opinion, I think that these social structures did work for Europe and England. I don’t think it could have been changed any better because it was already very organized and clear. Without these social structures, medieval Europe would not have been the same. Biography Social Structure in Medieval Europe. Web. 13 Feb. 2012. . The Feudal Structure of the Medieval World. Web. 13 Feb. 2012. . â€Å"Feudalism Pyramid.† Middle Ages. Web. 13 Feb. 2012. . Medieval English Society. Web. 13 Feb. 2012. . Ellis, Elisabeth Gaynor., Anthony Esler, and Burton F. Beers. Prentice Hall World History. Upper Saddle River, NJ: Pearson Prentice Hall, 2007. Print.

The Great Navigator Columbus

The great navigator Columbus Mr. Christopher Columbus (1451-1506) navigator Spain famous and pioneering major geographical discoveries in human history. He was in his youth believer in the theory of spherical Earth and not leading the famous Marco Polo every respect and appreciation, and the determination to become a navigator. During the period between the year 1492 and in 1502 crossed the Atlantic Ocean four times and discovered the American continent and became a great crew in the history of the world.Columbus Italy and had a passion for navigation and exploration since he was young and looked forward to traveling to China and India. And has repeatedly asked the Portuguese and Spanish kings and the British and French to help him do a cruise to the west until it reaches to the eastern states, but they rejected the plan because the spherical earth theory were not complete and convincing in those days. He spent more than ten years trying to convince people to help him implement his n avigational plan.In 1492 the queen of Spain with the help of satisfied Columbus financially the implementation of the plan. In September 1492 launched Columbus' fleet of three ships and 87 crew from Europe to the west, hoping to reach Asia in the end. A month after the fleet arrived at the dry ground, and Columbus and his men think Columbus and his men, it is the land of Asia, told the audience in Europe that they have arrived in India. Thus Columbus discovered the American continent without being aware of the fact discovered.This trip changed the great process of the evolution of the history of the world, and turned the World Trade Center from the Mediterranean Sea to the west shore of the Atlantic Ocean. In the following centuries, modern industrial civilization has become a new trend of the evolution of the global economy. The United States identified in 1792 on the 12th of October or the first two second-day of October each year, â€Å"Columbus Day†. In this day every yea r organizes most U. S. states many festive activities on the occasion of the anniversary of Columbus' discovery of the Americas.

The King of Matthias essays

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Biography of Jan Hus, Religious Reformer and Martyr

Biography of Jan Hus, Religious Reformer and Martyr A century before Martin Luther posted his 95 Theses criticizing the Roman Catholic Church, Czech pastor and church reformer Jan Hus pointed out the same problems. The Church labeled Hus a heretic and burned him at the stake. But Hus complaints would not die with him. Instead, they sparked a wildfire of protest that roared across Europe, changing Christianity forever. Early Life and Career The birth of Jan Hus around 1370 was of little notice in the southern Bohemian town of Husinec. His parents were peasants, and as an adult, he shortened his surname from Husinec to Hus. By 1394, Hus had earned a bachelors degree at the University of Prague. Two years later he added a masters and became an instructor at the university. A struggle at the university pitted the German masters, who opposed church reform, against the Czech masters, who admired the writings of John Wycliffe (1330 - 1384), an English reformer who translated the gospels into English. Wycliffes writings found their way into Prague about 1401, worsening the split between the Germans and Czechs. Hus Discovers Wycliffe Hus found himself agreeing with many of the points Wycliffe had raised. For example, Wycliffe considered Scripture to be the supreme authority, not the pope. He also opposed the sale of indulgences, Church documents which supposedly shortened or terminated a souls stay in purgatory. Wycliffes belief in trusting in Christ alone for salvation, rather than good works or obeying church rules, later became a cornerstone of the Reformation. Hus also agreed with Wycliffes plea for restraining clergy, who had become powerful landowners in Bohemia. Hus denounced the sin of simony, the practice of using a church position to profit from selling pardons or church appointments.   Church and Politics Needless to say, Hus positions were not popular with the local bishops and the pope. In 1403, Johann Hubner, one of the anti-reform German masters at the university, drew up a list of 45 of Wycliffes articles and condemned them as heresy. Besides the upheaval caused by the fledgling reform movement, this was a period of chaos in the Roman Catholic Church. There were two popes, Gregory XII and Benedict XIII, and a later election resulted in a third, Alexander V. Archbishop Zbynek Zajic of Bohemia, initially a supporter of Hus, turned against him and bribed Pope Alexander V to prohibit preaching in private chapels. Hus preached in Bethlehem Chapel in Prague. When Hus refused to follow the popes order, Archbishop Zbynek excommunicated him. Still, Hus continued to preach and teach at the university. Once more, the matter of indulgences came up when Alexanders successor, Pope John XXIII, sold them in Bohemia to raise money. Hus again condemned the practice, but that did not sit well with King Vaclav IV of Bohemia, who received a share from indulgence sales. Without Vaclavs support, Hus was excommunicated by the Roman curia. A church interdict was placed on Prague in 1412, which meant Catholics could not receive sacraments or be buried in church cemeteries. To spare the city, Hus fled to southern Bohemia, where he stayed in exile at the castles of friends. Hus Writes Feverishly In an attempt to answer charges against him, Hus wrote a lengthy book titled The Church (de Ecclesia) in which he asserted that Jesus Christ, not the pope, is the head of the church. Hus stated that Christ is the Rock upon which the church is built, not Peter. While Hus declared Catholics were obligated to obey the church when its laws were based on Scripture, he said they had no duty to obey when humanmade rules could not be supported by the Bible. In his book On Simony, Hus attacked the common practice of simony, rampant in the 15th century. Affluent parents bought high church positions for their sons, most of whom showed little interest in the gospel. That led to a string of lazy, corrupt church leaders. During that period Hus also penned a long series of letters to everyone from personal friends to the people of Prague to cardinals and the pope. Much of what is known about him comes from those documents. His other works explained the Ten Commandments, the Apostles Creed, and the Lords Prayer. Of course, many of Hus positions undercut church authority, a stance that further alienated him from the local archbishop and Rome. Hus was dangerously unaware of just how much he was hated by church officials. Betrayal and Execution In 1414, a naive Jan Hus traveled to a church conference in Constance, Germany, believing he would have the chance to defend himself before a group of church fathers gathered to discuss the situation of three sitting popes. Hus was promised safe passage there and back by King Sigismund of Hungary, Vaclavs half-brother, but when Hus arrived, he was arrested and thrown in prison. Located next to the latrines, Hus unsanitary cell stunk. The reformer grew so ill that treatment by the popes doctor and relocation to another cell were needed to keep Hus alive. When Hus finally appeared before the council, the loathing against him was overwhelming. Sigismund, caving to political pressure, secretly withdrew his vow of protection. The council concocted 30 false articles they said Hus taught, including that he was the fourth person of the Godhead. Every time Hus tried to defend himself, he was shouted down. On July 6, 1415, Hus was dressed in priestly vestments then ceremonially defrocked. He refused to recant his beliefs. Dragged to the place of execution, he was bound to the stake with a chain around his neck. Men piled wood up to his chin. Given one last chance to recant, Hus proclaimed his innocence. As the fire overtook him, Hus could be heard singing, Jesus, son of the living God, have mercy on me. Reformation Legacy Hus impact on later reformers was immense. In 1520, Martin Luther confessed, I have taught and held all the teachings of Jan Hus, but thus far did I not know it . . . In short, we are all Hussites and did not know it. Most mainstays of Protestant theology can be traced to Hus: Christ alone as head of the church, strict adherence to the Bible, all worship readings and sermons in the local language, reception of both wine and bread in communion, daily Bible reading by Christians, and the danger of temptations in culture. As a Catholic priest, Hus never advocated breaking from the church. Instead, he called for change, for reforming the corrupt bureaucracy of the church and returning to the nonpolitical norms of early Christianity. The system called his appeals heresy.   Jan Hus Fast Facts Full Name: Jan Hus  Also Known As: John Huss, Johann Huss  Occupation: Priest, theologian, teacher   Born: Between 1369 and 1372 in Husinec, Czech RepublicDied: July 6, 1415, in Constance, GermanyEducation: University of PraguePublished Works: The Church, On Simony, lettersKey Accomplishments: Inspired church reformers like Martin LutherFamous quote: In life eternal, there is perfect joy and light, without pain or torture, and there is communion with God Himself and His angels. Sources Christian History Institute.  To Build a Fire. https://christianhistoryinstitute.org/magazine/article/to-build-a-fire.Reformation 500. Jan Hus. https://reformation500.csl.edu/bio/jan-hus/.C.S. Lewis Institute. The Legacy of John Hus. cslewisinstitute.org/The_Legacy_of_John_Hus_FullArticle.Online Library of Liberty. Jan Huss,  The Church  [1411]. http://oll.libertyfund.org/titles/huss-the-church.Christianity Today, Christian History. John Huss, Pre-Reformation Reformer. https://www.christianitytoday.com/history/people/martyrs/john-huss.html.Encyclopedia Britannica. Han Hus, Bohemian Religious Leader. https://www.britannica.com/biography/Jan-Hus.The Famous People. 18 Thought-Provoking Quotes By John Huss That Prove Hope Springs Eternal. https://quotes.thefamouspeople.com/john-huss-87.php

A policy review of affordable housing in London Essay

A policy review of affordable housing in London - Essay Example Affordable housing policy has over time been the dream for the Londoners to find a sustainable solution to the housing challenges affecting this great city. In 2014 for instance, London housing strategy recognized that there is need to bring together adequate resources to enable London the development of 42,000 houses per year. This aims at virtually doubling the housing delivery for London. The strategy recognizes the need for collaboration between governments, private sector, mayor and boroughs. There is need for a policy framework that promotes support bringing up of surplus public land, as well as in promoting institutional investment to see London deliver the necessary housing.  a) Specific Policies for Boosting Housing SupplyThe London housing strategy under section 3.2 provides for policy reforms to create a flexible market and promote the growth of intermediate housing. The London policies have tremendously changed over time and in 2014, a policy to see increased housing de liveries involved the following (GLA, 2014,): Policy 1: the mayor of London city is expected to work with other partners to deliver the planned target for London which is 42,000 houses per annum. The policy provides for 25,000 market homes; 17,000 affordable homes that people can rent or buy; and 5,000 of the market homes shall be for purpose-built. This will include the long term private rent especially on the schemes which have more than one phase increasing the housing supply for the City.  Ã‚  

Researching Cancer Essay Example | Topics and Well Written Essays - 500 words

Researching Cancer - Essay Example al, 2005). However, sometimes the breast cells, which are especially sensitive to cancer causing agents (carcinogens), may change to abnormal cells that multiply out of control, causing cancer. Researchers suspect that interaction between estrogen and certain cyclins like cyclin-D1 can stimulate cell division (Clark et. al, 2005). They have also found that over-expression of the growth factor TGF-alpha can also trigger increased cell division in breast cells (Clark et. al, 2005). Unlike other type of breast cancers which present itself with a breast lump, IBC grows quickly in the narrow lymph vessels of the breast. The rapidly increasing breast cancer cells block the local lymphatic ducts in the breast, which is responsible for draining the waste, bacteria, viruses, excess and impurities from each part of the body and also help to carry useful white blood cells or lymphocytes and large proteins to the circulatory system (Virtual Medical Center, 2010). This restriction in drainage causes edematous swelling of the breast and nipple retraction (Virtual Medical Center, 2010). The IBC usually grows in nests or sheets and therefore, it can be diffuse throughout the breast with no palpable mass (Anderson, 2006). In inflammatory breast cancer, the cancer cells occupy large portions of the breast within a period of few weeks to months. Accumulation of the lymphatic fluid gives the skin of the breast a dimpled appearance like that of an orange peel (peau d’orange) (Life Extension, 1995). Other symptoms include rapid increase in breast size, redness, persistent itching and the skin feels hot to touch (Life Extension, 1995). IBC progresses rapidly and therefore it is not generally diagnosed until it is in Stage III or Stage IV, when the signs like edematous swelling of the breast, muscle aches and pains become more prominent (Rahn, 2006). This advanced and accelerated form of breast cancer cannot be usually detected by mammograms or ultrasounds (Life

Findings and Analysis Dissertation Example | Topics and Well Written Essays - 3500 words

Findings and Analysis - Dissertation Example Fig. 4.1 Key Themes The findings and analysis shall also include basic information on employees of B&M and their views on how they think management of B&M can improve on recruitment and selection process in the future and how management can retain workers who come into the company. 4.2 PRESENTATION AND DESCRIPTION OF RESULTS/FINDINGS Background Information on the Company and Workers B&M is a non profit organisation that offers free advice on issues relating to housing, money, debt, and welfare benefits services to the members of community. The company is located in London. It has been operating for more than forty (40) years and has been supported by the government such as The Home Office, City Council, and Community Initiative; Local Housing Association and Charity donations. The company recruits both paid and unpaid workers from the community and it has been run by voluntary committee of Management. The size of the organisation is very small consisting of operation manager, money a dvisor, debt advisor, administrator and volunteers to deliver the service. The sample for the interview was made up of five out of six workers of the company who were all females. ... On the role of workers in the company, all two (2) student-workers are trainee case workers. One (1) fulltime worker is a case worker, one (1) is a senior case worker and the other one (1) is the operations manager of the company. All participants acknowledged that their roles were very important in the running of the company. Among the five workers interviewed, the two student-workers have worked in the company for three and four months respectively. All the three full time workers have worked in B&M for three years. It was however revealed that the operations manager has over twenty years of experience working in similar work set up. Recruitment and Selection Methods and Processes used by B&M Recruitment as the recruitment is the process of identifying and hiring best-qualified candidate (from within or outside of an organization) for a job vacancy, in a most timely and cost effective manner (www.businessdictionary.com). When a company recruits from among its existing workers, we s ay they are practicing internal recruitment. On the other hand, when the company involves people who are outside its staff base in the recruitment, it is said to be undertaking external method of recruitment. Because of the staff size of B&M, the organisation uses external recruitment and selection method exclusively to get applicants to apply for vacancies. The mode of advertisement for vacancies, according to participants was mainly through the use of local community newspaper and university career employability. Reasons given by fulltime workers on why the organisation uses of community newspaper was that the organisation did not have enough funds to run expensive and wide range advertisement. It was also